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Submitted
HDL Coder Support Package for Microchip FPGA and SoC Devices
Generate, deploy, and verify HDL code for Microchip FPGAs and the FPGA portion of SoC Devices
25 days ago | 129 downloads |
Submitted
HDL Coder Support Package for Intel FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Intel FPGA and SoC devices
25 days ago | 4048 downloads |
Submitted
HDL Coder Support Package for AMD FPGA and SoC Devices
Generate and deploy HDL code and Embedded Software from MATLAB and Simulink for Xilinx FPGA and SoC devices
25 days ago | 7873 downloads |
Submitted
HDL Coder Self-Guided Tutorial
Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.
7 months ago | 8461 downloads |
Submitted
HDL Coder Evaluation Reference Guide
Getting started guide for learning and evaluating HDL Coder
1 year ago | 5425 downloads |
Submitted
HDL Coder Support Package for Xilinx RFSoC Devices
Generate code for the FPGA portion of RFSoC devices
3 years ago | 611 downloads |
Submitted
Vision HDL Toolbox Support Package for Xilinx Zynq-Based Hardware
Design and prototype vision systems using Xilinx Zynq-based hardware
3 years ago | 4117 downloads |
Submitted
HDL Coder Support Package for Xilinx FPGA Boards
Generate and deploy HDL code for Xilinx development boards
3 years ago | 5775 downloads |
Submitted
HDL Coder Support Package for Intel FPGA Boards
Generate and deploy HDL code for Altera development boards
3 years ago | 4120 downloads |
HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Refer to the following External Bug Report for a resolution to this issue: https://www.mathworks.com/support/bugreports/2656440...
4 years ago | 5
| accepted
Question
HDL IP Core generation for Xilinx Vivado fails since the year turned from 2021 to 2022
Since returning to the office in 2022, I have been unable to use HDL Workflow Advisor with Xilinx Vivado. I see the following er...
4 years ago | 2 answers | 5
2
answersGenerate C code for HLS?
While HLS does take C/C++ as an input, it typically requires some amount of hardware specification to successfully generate HDL....
5 years ago | 0
| accepted
Question
Generate C code for HLS?
Can I generate C code from MATLAB and Simulink and then feed it into a high-level synthesis (HLS) tool to generate HDL?
5 years ago | 2 answers | 0
2
answersDoes HDL Coder support the VHDL fixed-point and floating-point packages?
No. To ensure full portability and numerical consistency with MATLAB rounding and saturation, HDL Coder generates this functiona...
6 years ago | 0
| accepted
Question
Does HDL Coder support the VHDL fixed-point and floating-point packages?
Does the VHDL code generated by HDL Coder use the IEEE VHDL fixed-point or floating-point packages (IEEE.fixed_pkg.all, IEEE.flo...
6 years ago | 1 answer | 0
