Specify synchronous reset and enable behavior for blocks with state
HDL Coder / HDL Subsystems
Use the State Control block to toggle subsystem behavior between the default Simulink® simulation behavior and the synchronous hardware simulation behavior.
For default Simulink simulation behavior, set State control to
Classic. The simulation behavior in
Classicmode is the same as when you do not use the State Control block inside the subsystem.
For synchronous hardware simulation behavior, set State control to
Synchronous. The State Control block in
Synchronousmode improves the HDL simulation behavior of blocks with state, or blocks that have reset or enable ports. When use the
Synchronousmode of the block, the generated HDL code uses fewer hardware resources and the Simulink simulation behavior closely matches that of the digital hardware.
See Synchronous Subsystem Behavior with the State Control Block.
Conditional subsystems using classic semantics cannot have subsystems with synchronous semantics inside them.
You cannot flatten a synchronous subsystem up into a classic system.
Conditional subsystems must be single rate when you use the State Control block in synchronous mode.
Synchronous Enabled Subsystem cannot contain reset subsystems or a reset parameter port. For example, you cannot have a Delay block with an external reset port inside the subsystem.
All action subsystems connected to If and Switch Case blocks must have the same semantics, either classic or synchronous.
These blocks are not supported in synchronous mode:
Variable-size signals are not supported with synchronous semantics.
Synchronous semantics do not propagate across model boundaries. If your parent model has synchronous semantics, any referenced model must have synchronous semantics explicitly specified. At the root level of each referenced model, add a State Control block with the State control parameter set to
Supported Block Modes
The following restrictions apply to blocks in synchronous mode:
Delay block: When you have an external reset port, set the External reset to
ssSetStateSemanticsClassicAndSynchronousmust be set to
Stateflow® Chart (Stateflow): Set the State Machine Type to
MATLAB Function block:
You cannot have System objects inside the MATLAB Function block.
If you use nondirect feedthrough in a MATLAB Function block, do not program the outputs to rely on inputs or updated persistent variables. The MATLAB Function block must drive the outputs from persistent variables.
To use nondirect feedthrough, in the Property Inspector, clear the Allow direct feedthrough check box. See Use Nondirect Feedthrough in a MATLAB Function Block.
The following blocks are not allowed in synchronous mode:
The set of unit delay blocks in the Additional Math & Discrete > Additional Discrete sublibrary in Simulink, such as the Unit Delay Resettable and Unit Delay External IC blocks
Simulink blocks with Input processing set to
Columns as channels (frame based), where this parameter applies.
Continuous time blocks and blocks with continuous rate
Discrete-Time Integrator with reset port
HDL Minimum Resource FFT
PN Sequence Generator
Convolutional Interleaver and Convolutional Deinterleaver
General Multiplexed Interleaver and General Multiplexed Deinterleaver
Convolutional Encoder and Viterbi Decoder
Sample and Hold
State control — Select the state control type
Synchronous (default) |
Specify whether to use synchronous or classic semantics. The default is
C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.
HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.
HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.
This block has a single, default HDL architecture. HDL Coder does not generate HDL code specific to the State Control block. How you set the State Control block affects other blocks inside the subsystem that have state.
Introduced in R2016a