While Iterator Subsystem

Repeat subsystem execution during simulation time step while logical expression is true

Libraries:
Simulink / Ports & Subsystems

Description

The While Iterator Subsystem block is a Subsystem block preconfigured as a starting point for creating a subsystem that repeats execution during a simulation time step while a logical condition is true. Execution is controlled by a While Iterator block inside the subsystem. For an example, see ex_while_iterator_block.

Use While Iterator Subsystem blocks to model:

Block diagram equivalent of a program while or do-while loop.
An iterative algorithm that converges on a more accurate solution after multiple iterations.

When using simplified initialization mode, if you place a block that needs elapsed time (such as a Discrete-Time Integrator block) in a While Iterator Subsystem block, Simulink^® displays an error.

If the output signal from a While Iterator Subsystem block is a function-call signal, Simulink displays an error when you simulate the model or update the diagram.

Examples

Simulink Subsystem Semantics

This set of examples shows different types of Simulink® Subsystems and what semantics are used when simulating these Subsystems. Each example provides a description of the model and the subtleties governing how it will be executed.

Open Model

Parallel Channel Power Allocation

A potential use of the Find Nonzero Elements block. This block outputs a variable-size signal containing the indices of the nonzero values of the input.

Open Model

Ports

Input

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In1 — Signal input to a subsystem block
scalar | vector | matrix

Placing an Inport block in a subsystem block adds an external input port to the block. The port label matches the name of the Inport block.

Use Inport blocks to get signals from the local environment.

IC (initial logical condition) — Control initial execution of a subsystem block
scalar

Placing a While Iterator block connected to an Input block in a Subsystem block adds this external input port to the block.

Output

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Out — Signal output from a subsystem
scalar | vector | matrix

Placing an Outport block in a subsystem block adds an output port from the block. The port label on the subsystem block is the name of the Outport block.

Use Outport blocks to send signals to the local environment.

Block Characteristics

Data Types	`Boolean^a` \| `bus^a` \| `double^a` \| `enumerated^a` \| `fixed point^a` \| `half^a` \| `integer^a` \| `single^a` \| `string^a`
Direct Feedthrough	`no`
Multidimensional Signals	`yes^a`
Variable-Size Signals	`yes^a`
Zero-Crossing Detection	`no`
^a Actual data type or capability support depends on block implementation.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Actual code generation support depends on block implementation.

Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.

Actual data type support depends on block implementation.

Version History

Introduced before R2006a

While Iterator Subsystem

Description