Statistics
0 Questions
3 Answers
RANK
63.009
of 300.381
REPUTATION
0
CONTRIBUTIONS
0 Questions
3 Answers
ANSWER ACCEPTANCE
0.00%
VOTES RECEIVED
0
RANK
of 20.941
REPUTATION
N/A
AVERAGE RATING
0.00
CONTRIBUTIONS
0 Files
DOWNLOADS
0
ALL TIME DOWNLOADS
0
RANK
of 168.477
CONTRIBUTIONS
0 Problems
0 Solutions
SCORE
0
NUMBER OF BADGES
0
CONTRIBUTIONS
0 Posts
CONTRIBUTIONS
0 Public Channels
AVERAGE RATING
CONTRIBUTIONS
0 Highlights
AVERAGE NO. OF LIKES
Feeds
Can I generate HDL Code for models with Xilinx System Generator blocks?
i come across the similar problem, and i've asked it on xilinx's forum, but until now get no answer. https://forums.xilinx.com/...
meer dan 5 jaar ago | 0
FFT Error on FPGA with FPGA in the Loop workflow
i've tested the simulink model you attached. i think maybe you attached the wrong model? in the attached model, 1. you combin...
meer dan 5 jaar ago | 0
[Fixed Point Converter] 1000 bit fraction length at 2^x if x is loaded from .mat file?
i also sometimes find fixedpoint-tool is not easy to understand. i often first convert m-code from float point to fixed point, a...
meer dan 5 jaar ago | 0
