Error Goto/From connections subsystem boundaries

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Hi everyone I am a student trying to work in Simulink with Zedboard. I have a Boost Controler model of a PV system in simulink with the diode, IGBT... When I use HDL workflow to send mi work to the Zedboard, in the first step I see the following error:
"Goto/From connections cannot cross nonvirtual subsystem boundaries. The only exception is when a goto is connected to a state output port Component: Simulink | Category: Model error Invalid connection starts with 'PV2/powergui/EquivalentModel1/Status/Goto1' Component: Simulink | Category: Block error Invalid connection ends with 'PV2/Convertidor Elevador/Diode1/Status'"
I dont know what to do, this is the first time I work with diferent boards. Thank you

Answers (2)

Tim McBrayer
Tim McBrayer on 15 Aug 2016
I don't think that this has anything to do with the hardware board. The error is that From/Goto cannot cross a nonvirtual subsystem boundary. You may have an atomic subsystem intervening between the two halves of a From/Goto pair. Some of the block paths are listed in the message.
One further note: it looks like you are using Simscape blocks (e.g. 'PV2/powergui/EquivalentModel1/Status/Goto1'), which are not supported for HDL code generation. If yo are using these in your model they cannot be in the portion of the design you are generating HDL from.

Kiran Kintali
Kiran Kintali on 7 Mar 2023
Deploy Simscape Buck Converter Model to Speedgoat IO Module Using HDL Workflow Script
This example shows how to deploy a Simscape™ buck converter model to a Speedgoat IO334 Simulink®-programmable I/O module and then run the model in real-time at a sample step size as small as 1 microsecond. The example uses a DCDC converter topology to show how to prepare your power electronic converter model for hardware in the loop (HIL) simulation on a Speedgoat real-time target machine.
Simscape Hardware-in-the-Loop Workflow
Simscape support for HDL code generation and workflow to generate HDL code from the models and deploy to target hardware
You can generate HDL code for your plant model that you developed by using Simscape™ blocks and then deploy the generated code to standalone FPGA boards, or to FPGAs onboard the Speedgoat® I/O modules, SoC devices, and so on. By deploying the plant model to an FPGA board, you can accelerate the simulation of your plant model and simulate the model in real time by using Hardware-in-the-Loop (HIL) simulations.
Before you generate HDL code, use the sschdladvisor function to generate an HDL implementation model from Simscape switched linear models. Switched linear models are models that contain blocks such as diodes or switches. These blocks are defined by a linear relationship such as V = IR where R can switch between two or more values depending on the state of the diodes or switches.
After you generate the HDL implementation model, you can use HDL Coder™ to generate code for this model and deploy the generated code to target platforms by using the HDL Workflow Advisor. When you generate the HDL implementation model, you can specify whether to generate the implementation model with single-precision or double-precision floating-point data types. You can also specify insertion of a validation logic in the implementation model to verify whether the HDL implementation numerically matches the original Simscape algorithm.


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