How to create Verilog or VHDL code for deep learning networks using the Deep Learning HDL toolbox?

12 views (last 30 days)
I need some guidance on how to create Verilog/VHDL code for any deep learning model using the Deep Learning HDL Toolbox.
The Deep Learning HDL Toolbox documentation states the following: "Deep Learning HDL Toolbox enables you to customize the hardware implementation of your deep learning network and generate portable, synthesizable Verilog and VHDL code for deployment on any FPGA or SoC (with HDL Coder and Simulink)."
I am interested in understanding how to generate this HDL code and where it will be located.
I didn't find any simple examples of how to generate Verilog/VHDL code for a neural network. I noticed the examples of prototyping a neural network on a card, such as Get Started with Deep Learning FPGA Deployment on Intel Arria 10 SoC and Human Pose Estimation by Using Segmentation DAG Network Deployed to FPGA, which demonstrate the workflow as follows:
  1. Create Target Object
  2. Create Workflow Object
  3. Compile Workflow Object
  4. Deploy Workflow Object
However, this process doesn't provide the HDL code, and the code generated in the "codegen" folder is a BIN file.
Is there a method or workaround to create .VHD/.V code for a deep learning network?

Accepted Answer

MathWorks Support Team
MathWorks Support Team on 14 Apr 2025
Regarding the examples you referenced, "Get Started with Deep Learning FPGA Deployment on Intel Arria 10 SoC" and "Human Pose Estimation by Using Segmentation DAG Network Deployed to FPGA", it seems the issue might be related to using shipped bitstreams, which may not generate HDL files. To generate the HDL code, you can create a custom processor configuration, as mentioned in the "Custom Deep Learning Processor Generation to Meet Performance Requirements" example. The "Generate Custom Generic Deep Learning Processor IP Core" page also provides another example that generates a custom deep learning processor IP core.
After running this example, a directory hierarchy may be created in the project folder, as shown in the screenshot below:
You may be able to locate the HDL code for the deep learning network in one of the following directories:
  1. <projectfolder>/ipcore/GenericProcessor_v1_0_/hdl
  2. <projectfolder>/hdlsrc

More Answers (0)

Categories

Find more on System Integration of Deep Learning Processor IP Core in Help Center and File Exchange

Products


Release

R2024b

Community Treasure Hunt

Find the treasures in MATLAB Central and discover how the community can help you!

Start Hunting!