I have the problem that at the inport and outports of some bus creators/selectors there are wrong datatypes (and though the model is not compileable). I get the following error message:
Data type mismatch. Input port 1 of '<BusCreator>' expects a signal of data type 'single'. However, it is driven by a signal of data type 'double'.
Data type mismatch. Output port 1 of '<Subsystem>' is a signal of data type 'double'. However, it is driving a signal of data type 'single'.
As you can see e.g. the output datatype of the top signal ("DrvResis_fVehMEstimNum") is double but the input datatype to the bus creator is single.
But the datatype of the input to other subsystems is also double.
So how can this be? Shouldn't the datatype be fixed through the inputs/outputs of the subsystems?
Thank you very much in advance.