HDL coder Black box replacement for MAtlab code

I am using HDL coder to generate Verilog from a function (.m). I have a line of code wich assigns a result to an array. I would like HDL coder to automatically replace this line with an instantiation of a black box during its synthesis of the Verilog. Is this possible and How

Thanks

Answer 1

[Tim McBrayer]

You will need to replace your assignment with a System object inherited from hdl.BlackBox, and place the correct assignment behavior inside the System object. Search the documentation for "hdl.BlackBox" for more details.