Controling multiple switches in a multiple input DC-DC converter

I am trying to create a control system for a multiple input DC-DC boost converter with 4 inputs and a single output (2 voltage sources and 2 batteries), this is the topology of the converter:

The duty cycle for S1 and S2 should be from 0-20%and s3 should have a duty cycle from 0-80% and s4 should have a duty cycle of 80% to 100% (S3 and S4 cannot be on simultaneously).

The wave forms should look like this:

I used the "PWM generator (DC-DC)" to control s1 and s2, but I dont know how to control s3 and s4 and make sure they dont turn on simulatenously. Any tips on how to control the switches and what PWM generator blocks I should use or how to create a control system for the multiple input DC-DC converter would be greatly appreciated.

Answer 1

[Dr. Pemendra Kumar Pardhi]

Hi Mohamad For pwm generation in simelectronics voltage source are used with internal seting Please gate idea from given below link https://in.mathworks.com/matlabcentral/fileexchange/83388-buck-converter-with-gate-driver?s_tid=srchtitle_Pemendra%20_4

Answer 2

[Mohamad Nazir]

Hi Mohamad, to my understanding you need to have a charging/discharging case which can be simply modelled with a manual switch where you can manually toggle between the 2 cases. This can be modified later to become automatic based on what you need.

Concerning PWM generation, several blocks can be used so there's no problem there, however the idea is to create the correct switching pattern as shown in your Fig 2, this can also be done thanks to a switch that takes as input the working case (charge or discharge) and outputs the corresponding switching pattern.

You can find the solution described above in the attached screenshot.

Of course you would need to eliminate the constant blocks for the duty cycles in order to get a variable value depending on what you want to do (it could be the output of a voltage or current controller if I had to guess).

P.S: The NOT block in the discharging switching pattern ensures that S3 & S4 are not turned ON simultaneously.

Feel free to add more information about your application if you have further questions on the control system.

Answer 3

[Dr Narayanaswamy P R Iyer]

Hi Mohammad Alsalman: You have to use combined combinational and sequential logic. I give below how to generate gate pulse for S3 and S4:

Use a modulo 4 counter to count from 0 to 3 with count sequence B A = 0 0, 0 1, 1 0, 1 1. Then decode each counter output U1 = ~B&~A, U2 = ~B&A, U3 = B&~A and U4 = B&A where & and ~ represents the logic AND and NOT operaton symbols.

Now S3 = (U1&S1) || (U(2)&~S1) || (U(3)&~S1) || (U4&S1) where || represents the logical OR operator symbol. Also S4 = (~S3).

The clock frequency for the counter should be twice the frequency of switching S1 (or S2) with 50 % duty-cycle. You can get J-K flip-flops from Simulink extras block set and logic gates from Logic and Bit operations block set.

The gate drive model for your multi input boost DC to DC converter developed by me using Simulink and the simulation results are attached herewith.

From the simulation results the following conclusions are made:

S1 (or S2): on-on-off-off-on-on-off-off-on-on-off-off and so on.

S3 = on-off-on-off-off-on-off-on-on-off-on-off and so on.

When S3 is ON S4 is OFF and viceversa.

P.R. NARAYANASWAMY.

Dr. NARAYANASWAMY P R IYER

ELECTRONICS CONSULTANT

EMAIL: [e-mail]

[Mark Ceasar Cubelo]

Good day Dr. Iyer,

Would you mind if I could have a soft copy of your research study in PDF file? I am currently exploring Multi-input Multi-output Buck Boost Converter for my undergraduate study and I am looking for additional researches related to DC-DC converters.

Thank you, sir.

Sincerely,

Mark Cubelo

Answer 4

[Dr Narayanaswamy P R Iyer]

Hi Mohammad Alsalman: You have to use combined combinational and sequential logic. I give below how to generate gate pulse for S3 and S4. This is the revised and improved solution.

Use a modulo 4 counter to count from 0 to 3 with count sequence B A = 0 0, 0 1, 1 0, 1 1. Then decode each counter output U1 = ~B&~A, U2 = ~B&A, U3 = B&~A and U4 = B&A where & and ~ represents the logic AND and NOT operaton symbols.

Now S3 = (U1&S1) || (U(2)&~S1) || (U(3)&~S1) || (U4&S1) where || represents the logical OR operator symbol. Also S4 = (~S3).

The clock frequency for the counter should be FOUR times the frequency of switching S1 (or S2) with 50 % or any other duty-cycle. You can get J-K flip-flops from Simulink extras block set and logic gates from Logic and Bit operations block set. The J-K flip-flops must be positive edge triggered. If they are negative edge triggered, then use a NOT gate to invert the clock pulse. Also you can use either an external PWM square pulse generator with desired switching frequency for S1 or alternatively PWM gate pulse for S1 can be derived from the MSB bit B of modulo 4 counter. If you are using MSB bit B for switching S1, then use a NOT gate to invert the B output (If this NOT gate is not used to invert B output, S3 and S4 pulse will interchange position).

The revised gate drive model for your multi input boost DC to DC converter developed by me using Simulink and the simulation results are attached herewith.

From the simulation results the following conclusions are made:

S1 (or S2): on-on-off-off-on-on-off-off-on-on-off-off and so on.

S3 = on-off-on-off-on-off-on-off-on-off-on-off and so on.

When S3 is ON S4 is OFF and viceversa.

P.R. NARAYANASWAMY.

Dr. NARAYANASWAMY P R IYER

ELECTRONICS CONSULTANT

EMAIL: [e-mail]