Interpreting Waveform, Eye Diagram, and Timing Results
The Parallel Link Designer app analyzes and processes the results to extract waveform quality, interconnect delays, and timing margins after completing the simulation. This generates results spreadsheets along with waveforms to view and analyze. To view the waveform and timing reports, click Reports > Waveform and Timing Report.
Start your review of the data from the Waveform Summary tab. This tab lists the number of errors, warnings, and entries made during waveform processing.
If the results file shows no errors and warnings, proceed to Timing Results. If results report any errors or warnings, select the Waveform Margin by TNET tab. This tab contains a summary of all waveform and eye-diagram DRC checks that the app completed across all simulations, sorted by Transfer Net.
The Waveform Margin by Variation tab contains a summary of all waveform and eye-diagram Waveform DRC (WDRC) checks for each simulation. Numbers displayed in red are WDRC violations. This tab also displays ringback or transition violations.
You can explore any of these violations in more detail by reviewing the data in the Waveform Overshoot and Waveform Quality tabs. These tabs list each individual violation for each edge of every simulation. For each violation, the tab displays, the magnitude of the violation, the rule the violation being checked against, the time of occurrence, the node where the violation occurred, and the simulation checked.
You can use the simulation results to quickly identify the simulation edge that caused a violation and then view the violation in the waveform display tool. This tool determines whether the violation is a concern or not.
Eye Diagram DRC
Eye Rollups tab contains the next level of eye-diagram DRC results and contains a summary of all eye-diagram DRC checks that were done for each node of each Transfer Net. Any numbers displayed in red are DRC violations. You can explore any of these violations in more detail by reviewing the data in the Eye Details tab. This tab lists every eye-diagram processing parameter for each edge of every simulation run along with time during which the measurement was made in the simulation. You can sort the columns of this tab to display the data. This information lets you see the parameters of an eye-diagram without needing to use a waveform display tool.
If you want to view the eye-diagrams, you may do so using the Signal Integrity Viewer app.
This tab lists the setup and hold margins for each Transfer Net, as well as the minimum and maximum flight times (interconnection delays). Any setup or hold violations (negative margin) are in red. You can find the next level of information in the By Driver and By Receiver tabs. Use these tabs to explore which driver or receiver combination causes the violations.
Another useful tab is the Timing Waveform Margin Details tab. This tab reports both the timing margins and the waveform margins for each simulation. More detailed information is available in the Synchronous Details and Source Synchronous Details tabs. These two tabs give the setup and hold margins for every receiver in every simulation and includes all of the timing parameters that went into each setup and hold calculation. This simplifies the process of determining why each simulation passed or failed. These tabs should give you all the details necessary to examine and fix any potential timing problems.