Does FPGA-in-the-loop dump the VHDL code as well as provide data to the board?

Does FPGA-in-the-loop dump the code as well as provide data to the board or it provides the data into the board only, so we have to dump the code on the FPGA board separately?? Also Can we use FIL for Spartan 3E board? Which version of Matlab/Xilinx do I need for SPARTAN 3E?

Answer 1

[Tao Jia]

During simulation, FPGA-in-the-Loop would provide data to the FPGA board as input, and collect the output at the same time. We'll automatically generate an FPGA programming file so that you can use it to program the FPGA.

Unfortunately, Spartan 3E is not supported by FPGA-in-the-Loop. You'll need Spartan 6 FPGA boards - we support SP605, and Digilent Atlys boards.

[Mohammad Rafi Lone]

So you mean, we can generate the programming file here but we need to program the FPGA using Xilinx for example?