Interprocess Data Channel
Libraries:
SoC Blockset /
Processor Interconnect
C2000 Microcontroller Blockset /
Test Bench Blocks
Description
The Interprocess Data Channel block simulates the interprocessor data channel available in multiprocessor or OS managed SoC hardware board families. The block provides a channel for asynchronous data transfer between two processors. This diagram shows a generalized view of the interprocessor data connection.
To generate and execute C code for your SoC models, this block requires SoC Blockset™ Support Package for Infineon® AURIX™ Microcontrollers.
Examples
Limitations
In an SoC model, when Interprocess Data Channel blocks form a closed-loop between two or more tasks, it can create an artificial algebraic loop for the Simulink® solver. To break the loop, the Simulink solver implicitly adds a delay into the loop. This delay is related to an internal event and cannot be modified by the user, but the delay typically will be on the same order as the base time-step of the model. For more information on artificial algebraic loops in Simulink solvers, see Artificial Algebraic Loops.
Ports
Input
Output
Parameters
Version History
Introduced in R2020b