SoC Blockset™ enables you to simulate and analyze the performance of algorithms on programmable SoCs and ASICs. You can deploy these algorithms as hardware and software applications for prototyping and production.
The blockset lets you build models of hardware architectures by defining interfaces between processor cores, programmable logic, memory, and peripherals. You can use the models to partition algorithms between programmable logic and processors to analyze the tradeoffs between hardware and software implementation. The blockset also lets you specify task scheduling of software applications.
The SoC Builder app automates deployment by building IP cores and software for ARM® cores and programming development boards from Simulink® (with HDL Coder™ and Embedded Coder®).
SoC Blockset supports the analysis of deployed applications in hardware with performance diagnostics and software profiling tools. Supported devices include Xilinx® Zynq®-7000 SoCs, Zynq UltraScale+™ MPSoCs/RFSoCs, and Versal® ACAPs, as well as Intel® SoC FPGAs.
Learn the basics of SoC Blockset
System on Chip (SoC)
Combine processor software, programmable logic, memory, and peripherals into complete SoC designs
Design and develop the software for the embedded processor component of an SoC application
Design and develop the custom hardware for the programmable logic (PL) or FPGA component of an SoC application
Design and develop the shared memory and data register components of an SoC application
Design and develop the external peripheral components, from GPIO to integrated video stream components, of an SoC application
SoC Blockset Supported Hardware
Support for third-party hardware, such as Xilinx or Intel SoCs and Infineon® AURIX™ or ARM Cortex® devices