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AXI Manager

Access AXI subordinate memory on FPGA board from MATLAB® or Simulink®


MATLAB AXI master has been renamed to AXI manager. In the software and documentation, the terms "manager" and "subordinate" replace "master" and "slave," respectively.

Access on-board memory locations from MATLAB or Simulink by using the AXI manager IP in your FPGA design. This IP connects to subordinate memory locations on the board. The IP also responds to read and write commands from MATLAB or Simulink, over JTAG, PCI Express®, or PL Ethernet interface.


setupAXIManagerForQuartus Add AXI manager IP path to Quartus project
readmemoryRead data out of AXI4 memory-mapped subordinates
writememoryWrite data to AXI4 memory-mapped subordinates
releaseRelease JTAG or Ethernet cable resource
copyImageToHostSDCardPathCopy board-specific SD card image files to host SD card location (Since R2020a)
loadBitstreamLoad custom FPGA bitstream and corresponding DTB file to target SoC device (Since R2020a)


aximanagerRead and write memory locations on FPGA board from MATLAB


AXI Manager ReadRead memory locations on FPGA board from Simulink (Since R2019b)
AXI Manager WriteWrite memory locations on FPGA board from Simulink (Since R2019b)