Optimize Feedback Loop Design and Maintain High Data Precision for HDL Code Generation

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Optimize a feedback loop design and maintain high data precision for HDL code generation by using native floating point and clock-rate pipelining when generating HDL code from a MATLAB® design.

Open the MATLAB Code

The MATLAB function feedback_fcn describes a feedback loop that keeps track of the previous state value and adds it to the current value.

open('feedback_fcn')

function y = feedback_fcn(u)
persistent state;
if isempty(state)
    state = 0;
end
y = u + state + 1;
state = y;

Create HDL Code Generation Configuration Object and Apply Clock-Rate Pipelining

The variable state is a persistent variable. In HDL code generation, persistent variables act as delays and map to a register. As a result, persistent variables introduce latency in the feedback loop. To compensate for this latency in the generated HDL code, you can use clock-rate pipelining. For more information on clock-rate pipelining, see Clock-Rate Pipelining.

To programmatically apply clock-rate pipelining, first create a coder.HDLConfig object.

hdlcfg = coder.config('hdl');

Set the DesignFunctionName property to the MATLAB function and the TestBenchName property to the test bench script, feedback_fcn_tb.

hdlcfg.DesignFunctionName = 'feedback_fcn';
hdlcfg.TestBenchName = 'feedback_fcn_tb';

Enable GenerateHDLTestBench to generate HDL test bench code from feedback_fcn_tb.

hdlcfg.GenerateHDLTestBench = true;

Enable clock-rate pipelining and set an oversampling factor based on the amount of latency introduced in the design. In this example, the design requires a 22x faster clock than the base rate. Set the oversampling factor to 22.

hdlcfg.ClockRatePipelining = true;
hdlcfg.Oversampling = 22;

Use Native Floating Point for HDL Code Generation

The test bench function feedback_fcn_tb uses the double data type as the input to feedback_fcn.

open('feedback_fcn_tb')

for ii = 1:10
    y = feedback_fcn(ii);
end

Using a double data type as the input for HDL code generation produces non-synthesizable code unless you either convert the input to fixed-point or use native floating point. To maintain high data precision, use native floating point. The tradeoff is that more hardware resources are needed to store floating-point values than fixed-point values.

To enable native floating point, first enable the AggressiveDataflowConversion property. This property transforms the control flow algorithm of the MATLAB code inside the MATLAB function to a dataflow representation, which native floating point uses.

hdlcfg.AggressiveDataflowConversion = true;

Use native floating point for HDL code generation by setting the FloatingPointLibrary property to NativeFloatingPoint.

hdlcfg.FloatingPointLibrary = 'NativeFloatingPoint';

Generate a Simulink® model that contains Simulink blocks that is functionally equivalent to your MATLAB function design. The Simulink model performs the algorithm designed in your MATLAB function. This property requires a Simulink license.

hdlcfg.GenerateMLFcnBlock = true;

Generate HDL Code

Generate HDL code with an HDL code generation report by using the codegen function.

codegen -report -config hdlcfg

### Begin MATLAB to HDL Code Generation...
### Working on DUT: feedback_fcn.
### Using TestBench: feedback_fcn_tb.
### Generating new model: '<a href="matlab:open_system('gm_feedback_fcn')">gm_feedback_fcn</a>'.
### Begin model generation 'gm_feedback_fcn'...
### Rendering DUT with optimization related changes (IO, Area, Pipelining)...
### Model generation complete.
### The DUT requires an initial pipeline setup latency. Each output port experiences these additional delays.
### Output port 1: 1 cycles.
### MESSAGE: The design requires 22 times faster clock with respect to the base rate = 1.
### Working on feedback_fcn_tc as /tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/feedback_fcn_tc.vhd.
### Begin VHDL Code Generation
### Working on feedback_fcn/nfp_add_double as <a href="matlab:edit('/tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/nfp_add_double.vhd')">nfp_add_double.vhd</a>.
### Working on feedback_fcn_enb_bypass as <a href="matlab:edit('/tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/feedback_fcn_enb_bypass.vhd')">feedback_fcn_enb_bypass.vhd</a>.
### Working on feedback_fcn as <a href="matlab:edit('/tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/feedback_fcn.vhd')">feedback_fcn.vhd</a>.
### Generating package file <a href="matlab:edit('/tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/feedback_fcn_pkg.vhd')">feedback_fcn_pkg.vhd</a>.
### Generating Resource Utilization Report <a href="matlab:hdlcoder.report.openDdg('/tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/resource_report.html')">resource_report.html</a>.
### Generating Optimization report  
### To rerun codegen evaluate the following commands...

---------------------
cgi    = load('/tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/codegen_info.mat');
inVals = cgi.CodeGenInfo.inVals;
cfg    = cgi.CodeGenInfo.codegenSettings;
codegen -config cfg -args inVals -report
---------------------


### Begin TestBench generation.
Code generation successful.

### Accounting for latency of output port : 1 cycles.
### Collecting data...
### Begin HDL test bench file generation with logged samples
### Generating test bench data file: /tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/u.dat.
### Generating test bench data file: /tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/y_expected.dat.
### Working on feedback_fcn_tb as /tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/feedback_fcn_tb.vhd.
### Generating package file /tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/feedback_fcn_tb_pkg.vhd.
### Generating HDL Conformance Report <a href="matlab:web('/tmp/Bdoc26a_3153988_1362038/tpd2b8fdf1/hdlcoder-ex54382413/codegen/feedback_fcn/hdlsrc/feedback_fcn_hdl_conformance_report.html')">feedback_fcn_hdl_conformance_report.html</a>.
### HDL Conformance check complete with 0 errors, 0 warnings, and 1 messages.
### Code generation successful: To view the report, open('codegen/feedback_fcn/hdlsrc/html/report.mldatx')

See Also

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