Processor-in-the-Loop (PIL) Simulation

The processor-in-the-loop (PIL) simulation cross-compiles the generated source code, and then downloads and runs the object code on the target hardware. The connectivity configuration that you create for PIL simulation controls the way code is compiled and executed on the target. By comparing normal and PIL simulation results, you can test the numerical equivalence of your model and the generated code. During a PIL simulation, you can collect Code Coverage and execution-time metrics for the generated code. For general information on PIL simulations, see SIL and PIL Simulations and Configure and Run PIL Simulation.

With Embedded Coder^® Support Package for Infineon^® AURIX™ TC3x Microcontrollers, you can run processor-in-the-loop (PIL) simulations in three different modeling scenarios:

• Top model

• Referenced model

• PIL block that you create from subsystems

Refer to Code Verification and Validation with PIL example to configure any Simulink model to run PIL simulations in these three modeling scenarios on the Infineon AURIX TC3x hardware board.