IBIS-AMI

What Is IBIS-AMI?

The IBIS algorithmic modeling interface (IBIS-AMI) is a modeling standard for SerDes PHYs that enables fast, accurate, statistically significant simulation of multi-gigabit serial links. IBIS-AMI was developed by a consortium of EDA, semiconductor, and systems companies and was initially approved as part of the IBIS 5.0 Specification in August 2008. Since then, the standard has continued to evolve with several enhancements. For example, support of PAM modulation and back-channel communication haven been added to model emerging interfaces such as DDR5 and PCIeGen5.

The latest features of the IBIS-AMI standard were rapidly implemented in MATLAB® with Signal Integrity Toolbox™ (with features incorporated from the acquired SiSoft QCD and QSI). SerDes Toolbox™ enables engineers to generate IBIS-AMI models for high-speed digital interconnects.

The IBIS-AMI specification was developed with the following goals:

  • Interoperability: Models from different semiconductor vendors work together
  • Transportability: The same model runs in different IBIS-AMI simulators
  • Performance: 10 million bit simulations run in 10 minutes or less
  • Flexibility: Models support both statistical and time-domain simulation
  • Usability: Models expose control parameters users can set for simulation
  • IP Protection: Models cannot be reverse engineered; semiconductor vendors control which details are exposed to the user

What are IBIS-AMI models?

IBIS-AMI models are used to model high-speed serial and parallel links that include transmitter and receiver equalization algorithms such as PCI-e, USB, Ethernet, and DDR.

IBIS-AMI models make multi-million-bit simulations practical, accurately model vendor-specific equalization, and clock recovery algorithms and make mixed-vendor analysis quick and easy.

Image of a high-speed serial link designed with the SerDes Designer app

CEI-56G-LR model used for generating IBIS-AMI models, created with the SerDes Designer app.

The fundamental assumption behind IBIS-AMI models is that SerDes channels can be broken into two parts for analysis:

  • Analog  – including the electrical model of the physical interconnect. Usually characterized using circuit simulation techniques and represented with IBIS models.
  • Algorithmic – including the equalization digital signal processing algorithms of the transmitter (TX) and receiver (RX). Modeled through the Algorithmic Modeling Interface (AMI) of the IBIS-AMI standard.

In IBIS-AMI models, the TX output driver and the RX input termination are isolated from their respective equalization through a “high-impedance” node, and the analog channel can be considered linear and time invariant (LTI).

Schematic representation of the breakdown between analog channel and algorithmic models according to the IBIS-AMI standard

High-speed digital link the represents the IBIS-AMI standard.

IBIS-AMI models are made of text files (.ibs and .ami) describing the analog channel, the package models, the parameters of the SerDes interface, and executable shared libraries (.dll, .so) describing the equalization algorithms.

Different files required by an IBIS-AMI model to execute on Windows and Linux

File architecture of IBIS-AMI models.

The AMI file describes the interface to control the features the model supports and provides the controls the user can set.

Example of an IBIS-AMI file for a transmitter with reserved and model specific parameters

Example of AMI file generated with SerDes Toolbox.

How do IBIS-AMI models work?

End-to-end channel simulation with IBIS-AMI models can be done in the statistical or time domain. In statistical analysis (invoked using AMI_Init) the eye is computed directly from step/pulse response and the equalization is static. Statistical analysis can be used to compute very low probabilities of errors (1e-45).

Example of statistical analysis performed with Signal Integrity Toolbox.

Example of statistical analysis performed with Signal Integrity Toolbox.

When simulating IBIS-AMI models in the time domain (invoked using AMI_Getwave), the SerDes response is computed based on specific input patterns and the equalization algorithms can be adaptive (non-LTI). Normally time-domain simulation of IBIS-AMI models can be used to compute probabilities of bit error rate (BER) in the range of 1e-6 to 1e-8. Smaller BER are often derived through extrapolation, applying jitter, and post-processing of the results. An IBIS-AMI model that supports both statistical analysis and time-domain simulation is called a dual model.

Example of time-domain simulation performed with Signal Integrity Toolbox.

Example of time-domain simulation performed with Signal Integrity Toolbox.

How do you use IBIS-AMI models?

IBIS-AMI models are used to verify the overall link performance and optimize the equalization algorithms. The algorithmic models describing adaptive equalization are simulated together with the analog channel described by means of Spice, IBIS, analytical models, and S-parameters. The simulation speed of IBIS-AMI models allows engineers to test a very large set of channel configurations and isolate critical cases.

Using IBIS-AMI models, SerDes designers and signal integrity engineers verify if equalization algorithms can compensate channel losses and reflections due to discontinuities.

Simulation results of CTLE equalization showing he transfer function, the pulse response, and the equalized eye

Example of CTLE equalization results obtained with Signal Integrity Toolbox. On the left: the cascaded transfer function of the channel and different CTLEs. In the middle: pulse responses of the CTLE configurations. On the right: eye diagram associated with the best CTLE configuration.

Simulation results of CTLE equalization showing the pulse response and the eye diagram with different number of taps

Example of DFE equalization results obtained with Signal Integrity Toolbox. From top to bottom, the pulse response and the equalized eye are show with no taps, 1 tap, and 2 taps.

See also: Signal Integrity Toolbox, SerDes Toolbox, mixed signal systems, wireless and wired communications systems, semiconductor development, signal integrity, serdes

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