HDL Coder Set Target Frequecny
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shauk on 18 Apr 2017
Answered: Astarag Chattopadhyay on 26 Apr 2017
in the FPGA Turnkey option from HDL coder, there is a option "1.3 Set Target Frequency" and it has two sub options "FPGA Input Clock Frequency" and "FPGA a System Clock Frequency". Could anyone explain me what the mean exactly. What i understood from one of the MATLAB webinar is if my "FPGA Input Clock Frequency" is 50 MHz and i want to run the design slower than that then i should set the "FPGA a System Clock Frequency" to that value, for example 30 MHz. Can i do it the opposite way also, like can i increase it from 50 MHz to 100 MHz as my FPGA supports unto 200 MHz. Please correct me if i am wrong.
Astarag Chattopadhyay on 26 Apr 2017
The "FPGA Input Clock Frequency" is the frequency which is the input to the clock module of FPGA and the "FPGA System Clock Frequency" is the one coming out of the clock module which decides at which frequency the system should run on FPGA. "FPGA System Clock Frequency" can be greater than the "FPGA Input Clock Frequency". It all depends on the clock module, it can multiply or divide an input clock frequency to generate a desired system clock frequency.
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