With the HDL Coder™ software, you can implement a simplified protocol in your model for AXI4-Stream, AXI4-Stream Video, or AXI4 Master mapping. The software generates an HDL IP core with the corresponding interfaces.
How to design your model for AXI4 or AXI4-Lite interfaces for scalar, vector ports, bus data types, and read back values.
How to design your model for AXI4-Stream vector or scalar interface generation.
How to design your model for IP core generation with AXI4-stream video interfaces.
Description of AXI4 Master protocol, and how you can design your model for IP core generation with AXI4-Master interfaces.