You can use the hardware-software co-design workflow to partition your
design to run on SoC platforms. By using the HDL Workflow Advisor, you can
IP Core Generation workflow to generate an HDL IP
core that runs on the FPGA on board the SoC. Using Embedded Coder®, you can generate and build the embedded software, and run it
on the ARM® processor.
High-level workflow steps for targeting an SoC platform.
Learn the basics of the HDL Workflow Advisor and how to run various tasks.
Export, import, or configure an HDL Workflow CLI command script.