Custom Board and Reference Design
HDL Coder™ can generate an IP core that you can deploy to the Xilinx FPGA boards. You can integrate the generated IP core into the default system reference design or into your own custom reference design that you can register for the board.
|Board registration object that describes SoC custom board|
|Reference design registration object that describes SoC reference design|
- Board and Reference Design Registration System
System for defining and registering boards and reference designs.
- Register a Custom Board
Define the interface and attributes of a custom SoC board. After defining the board, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.
- Register a Custom Reference Design
Define the interface and attributes of a custom SoC reference design. After defining and registering the reference design, you can target it using the IP Core Generation Workflow in the HDL Workflow Advisor.
- Define Custom Parameters and Callback Functions for Custom Reference Design
Learn how to define custom parameters and custom callback functions for your custom reference design.
- Define and Add IP Repository to Custom Reference Design
Learn how you can create an IP repository and add the IP modules in the repository to your custom reference design.