Verify Numerical Accuracy Using PIL

In a processor-in-the-loop (PIL) simulation, the generated code runs on an embedded processor or QEMU emulating an embedded processor. The results of the PIL simulation are transferred to Simulink® to verify the numerical equivalence of the simulation and the code generation results. The PIL verification process is a crucial part of the design cycle to check that the behavior of the generated code matches the design. For more information PIL simulations, see SIL and PIL Simulations.

For versions of these work flows for ARM® Cortex®-A based processors, see .

PIL Verification Using PIL Block

When performing PIL verification using a block:

  • You can verify code generated for subsystems.

  • You can verify numerical equivalence by comparing the signals of the two blocks

  • You must provide a test harness model to supply test vector or stimulus inputs.

  • You must swap your original subsystem with a generated PIL block. Do not save your model in this state, or you will lose your original subsystem.

For more information PIL verification with blocks, see Choose a SIL or PIL Approach.

To create and test a subsystem block using an equivalent PIL block, follow this workflow:

  1. Create a new model and name it TestHarness.

  2. Configure the model for the ARM Cortex-A processor following the steps in Configure a Model for ARM Cortex-A9 QEMU Emulator.

  3. On the Hardware tab, click Hardware Settings.

  4. In the Configuration Parameters dialog box, set Code Generation > Verification > Advanced parameters > Create block to PIL. Click OK.

  5. Add a Subsystem (Simulink) block to the model and name it Controller.

  6. Create a test harness. For example, you can:

    • Connect to a shared plant model.

    • Use parallel inputs for the Subsystem and PIL blocks.

    • Use a Sum (Simulink) block to compare the outputs for differences.

    • Connect the output of the Sum block to a Scope block to display the numerical differences.

    • Use a Manual Switch (Simulink) block to toggle between the outputs of the two blocks.

    The following image shows a sample TestHarness model.

  7. Right-click the Controller Subsystem block and select Block Parameters (Subsystem).

  8. In the Subsystem dialog box, select Treat as atomic unit.

  9. Place or create the model that you want to test within the Subsystem (Simulink) block.

  10. Right-click the Subsystem block and select C/C++ Code > Build This Subsystem.

  11. In the Build code for Subsystem dialog box, click Build.

    The model, untitled*, contains a PIL block named after the subsystem.

  12. Copy the PIL block from untitled* to the test harness model.

  13. Close untitled* without saving it.

  14. Set Simulation mode to Normal.

  15. Click Run to start the PIL simulation.

    In a PIL simulation, the test harness model executes in Simulink software while the PIL block executes on the embedded processor. The simulation lasts for the duration specified by the Simulation stop time. During the simulation, you can:

    • Use the Manual Switch to toggle between the two outputs.

    • Observe the scope for numerical differences.

Perform PIL Verification Using Model Block PIL

When performing PIL verification using a model block:

  • You can verify code generated for referenced models.

  • You can verify that the outputs of the blocks are numerically equivalent.

  • You can easily switch a model block between the normal and PIL simulation mode.

  • You must provide a test harness model to supply test vector or stimulus inputs.

For more information, see Model (Simulink).

To create and test a subsystem block using Model Block PIL, follow this workflow:

  1. Create the referenced model that you want to verify using PIL simulation.

  2. Create a test model on which to run the PIL simulation.

  3. Configure both the referenced model and test model for the ARM Cortex-A processor by following the steps in Build and Run an Executable on the ARM Cortex-A9 QEMU Emulator.

    Note

    You must maintain the same model Configuration Parameter values for both the referenced model and the test model. To share a configuration between the two models, see Share a Configuration with Multiple Models (Simulink).

  4. Add a Model (Simulink) block to the test model that points to your referenced model, as described in Reference Existing Models (Simulink).

  5. Copy and paste the Model block so the test model contains two identical Model blocks.

  6. Create parallel inputs and outputs for the Model blocks.

  7. Right-click one of the Model blocks, and select Block Parameters (ModelReference).

  8. In the Block Parameters dialog box, set Simulation mode to Processor-in-the-Loop (PIL) and set Code Interface to Model reference. Click OK.

  9. Leave the Simulation mode of the test model and the other Model block set to Normal.

  10. Click Run.

    In this simulation, the test model and one Model block execute in Simulink software while the Model block that you configured to use PIL executes on the embedded processor. The simulation lasts for the duration specified by the Simulation stop time.

PIL Verification Using PIL Simulation for Top Models

When performing PIL verification using top–model simulation:

  • You can verify code generated for a top model.

  • You can record PIL simulation data from your model.

  • You can review PIL simulation data using the Simulation Data Inspector.

  • You can switch the entire model between normal and PIL simulation mode.

  • You must configure the model to load test vectors or stimulus inputs from the MATLAB® workspace.

To create and test a top-model PIL simulation, follow this workflow:

  1. Create the test model that you want to verify.

  2. Configure the model for the ARM Cortex-A processor by following the steps in Build and Run an Executable on the ARM Cortex-A9 QEMU Emulator.

  3. Set Simulation mode to Processor-in-the-Loop (PIL).

  4. Click the Simulation Data Inspector button arrow, and enable Send Logged Workspace Data to Data Inspector.

  5. Click Run.

    The test model simulates in PIL mode on the embedded processor. The simulation lasts for the duration specified by the Simulation stop time.

  6. When the PIL simulation stops, click Simulation Data Inspector to review the PIL data.

See Also

(Simulink) | (Simulink)

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