When output and update code is in one function in the generated code, force the simulation execution order to be the same as the code generation order. For certain modeling patterns, setting this parameter prevents a potential simulation and code generation mismatch. Setting this parameter might cause artificial algebraic loops. If your model requires this parameter, Simulink generates a warning of a potential simulation and code generation mismatch during the model build. The warning states that your model
...references a model that has an inport that is used during update only
but the model combines output and update methods. This may result in a mismatch
between simulation and code generation results.
Forces simulation execution order to be the same as code generation order when output and update code are in one function. You might get the preceding warning if your model meets these conditions:
The referenced model has a single output/update
function, uses function prototype control, or generates
A referenced model input connects only to blocks that do not use their input values to calculate their output values during the same time step, such as Delay or Integrator blocks. The input port is not associated with a Function-Call Subsystem port in the referenced model.
The referenced model uses a shared global resource such as a global data store.
For the preceding modeling pattern, the simulation execution order might be different than the code generation order. If the execution order is different, an answer mismatch between simulation and code generation might occur.
Selecting this parameter might cause artificial algebraic loops in simulation. Select it only if you get a warning about a possible simulation versus code generation mismatch, and you plan to generate code.
|Safety precaution||No impact|