setDataType

Configure data type for the data captured from a signal

Syntax

setDataType(DC,name,type)

Description

Add-On Required: This feature requires one of these add-ons.

• HDL Verifier Support Package for Intel FPGA Boards
• HDL Verifier Support Package for AMD FPGA and SoC Devices

setDataType(DC,name,type) specifies the data type, type, for the data captured from a signal, name.

Input Arguments

DC — Customized data capture object

hdlverifier.FPGADataReader System object™

Customized data capture object, specified as an hdlverifier.FPGADataReader System object.

name — Trigger component signal

character vector

Specify a signal name matching one that you configured when you generated the object. The signal must be configured as a data signal.

type — Data type for the captured data

built-in data type | numerictype

The bit width of the data type must match the bit width of the captured signal. This size is the width you specified for the port on the generated IP.

The function supports these data types, depending on the bit width of the captured signal: boolean, uint8, int8, uint16, int16, half, uint32, int32, single, uint64, int64, double, and numerictype.

Version History

Introduced in R2017a