Processor-in-the-Loop Verification of Simulink Models
This example shows how to use HDL Coder® Support Package for Intel® FPGA and SoC Devices to verify code using PIL simulation.
Introduction
Configure a Simulink® model to run as a processor-in-the-loop (PIL) simulation. In a PIL simulation, the generated code runs on the ARM® Cortex®-A processor in the Intel SoC device. The results of the PIL simulation are transferred to Simulink to verify the numerical equivalence of the results between the simulation and the code generation. The PIL verification process is a crucial part of the design cycle to check that the behavior of the generated code matches the design. For more information on PIL simulation techniques, see SIL and PIL Simulations.
Requirements
Perform Verification Using Model Block PIL Simulation
This section shows how to create and test a subsystem block using Model block PIL workflow.
1. Open alterasoc_model_block_pil model. The CounterA model block contains the simulation model. CounterB model block contains the model to test in a PIL simulation. For more information on model referencing, see Reference Existing Models.
2. On the Apps tab of the Simulink Toolstrip, under Code Verification, Validation and Test, click SIL/PIL Manager.
3. On the SIL/PIL tab of the Simulink Toolstrip, set System Under Test to Model blocks in SIL/PIL mode.
4. Configure and run CounterA block in PIL simulation mode. Open the CounterA block mask by right-clicking on the block and selecting Block Parameters (ModelReference). In the Function Block Parameters: CounterA window, set Simulation mode to Processor-in-the-loop (PIL). Click OK.
5. On the SIL/PIL tab of the Simulink Toolstrip, click Run Verification to start the PIL simulation with the reference model block executing in the Intel SoC device.
6. When the model runs, Scope1 displays the PIL simulation output running on the ARM Cortex-A processor in the Intel SoC device. Scope2 shows the normal mode simulation output.
Perform Verification Using Top Model PIL Simulation
This section shows how to create and test a top-model PIL simulation.
1. Open the alterasoc_top_model_pil model.
2. On the Apps tab of the Simulink Toolstrip, under Code Verification, Validation, and Test, click SIL/PIL Manager.
3. On the SIL/PIL tab of the Simulink Toolstrip, set System Under Test to Top Model and set SIL/PIL Mode to Processor-in-the-Loop (PIL).
4. To start the PIL simulation of the model, on the SIL/PIL tab, click Run Verification.
When the PIL simulation stops, the Simulation Data Inspector automatically opens to show a comparison of the outputs, count_a and count_b, between the simulation and the PIL execution.
