Implementing a Wireless Receiver on an FPGA, Part 2: Elaborating and Prototyping the Transmitter and Receiver Model

From the series: Implementing a Wireless Receiver on an FPGA

Idin Motedayen-Aval, MathWorks

In Part 2 of this three-part series, we elaborate and prototype the QPSK model built in part 1.  In this portion, we will show you how to:

  • Add impairments and channel effects to the baseline model
  • Design mitigation and synchronization algorithms
  • Test design with real world captured data

Product Focus

  • HDL Coder
  • Simulink
  • DSP System Toolbox
  • Communications System Toolbox
  • Instrument Control Toolbox

Recorded: 29 aug 2012

Series: Implementing a Wireless Receiver on an FPGA

Part 1: Creating and Verifying a Baseline Wireless Transmitter and Receiver Using Simulink
In Part 1 of our series, we begin by building a baseline QPSK Model using Simulink.

Part 2: Elaborating and Prototyping the Transmitter and Receiver Model
In Part 2 of this three-part series, we elaborate and prototype the QPSK model built in part 1.

Part 3: Implementing and Verifying the Design on Target Hardware
In the final section of this three-part series, we implement and verify the design on target hardware.